1. Field of the Invention
The invention relates to computing systems and, more particularly, to a register access protocol.
2. Description of the Related Art
Processing devices such as microprocessors typically include numerous registers which are accessed during operation. Some registers (e.g., general purpose registers) may be configured to store operand data, results of operations, addresses, and so on. Other registers may be configured to store status information concerning the operation of a particular unit of the device. Still other registers may be used to configure devices for operation by writing predetermined data to the registers. Numerous such uses of registers, and others as well, may be found in processing devices and computing devices in general.
As may be appreciated, modern microprocessors are typically designed as multiple units which are configured to communicate and co-operate with one another in order to accomplish larger processing tasks. For example, a basic microprocessor may include an instruction fetch unit, a decode unit, an execution unit, and a write-back unit. Each of these units may generally include configuration, status, and other registers which are specific to the particular unit. During processing it is frequently necessary to access these registers in order to accomplish certain tasks.
In fine grain multithreaded processors it may be necessary for multiple threads to have access to various registers which are distributed throughout various units. Consequently, an orderly and efficient mechanism for managing access to the registers is desired.